Converter Passion will try to plant some seeds of data converter knowledge
Hi all, and my sincere apologies for not posting for a while. I’ve had some rather intense family emergencies that kept me out of the blogosphere for a few months. Slightly wiser from the experience, I want to be careful to not promise too much in terms of blog activity, but the current plan is to resurface more seriously after the upcoming holidays and the New Year.
One of the activities I’ve planned is to list useful data converter resources on the web. First out could be recommended literature for those wanting to catch up on the basics [whatever that may be]. I’ve been contemplating making these lists for some time now, but was re-inspired by the app note/report A Glossary of Analog-to-Digital Specifications and Performance Characteristics highlighted in a recent TI newsletter. It doesn’t have to be just app notes, but it should be resources that are completely open and freely available – preferably without any registration procedures. So please e-mail me, or post a comment here with your suggestions for the best internet resources for anyone new to the field.
Being a bit old-school, I still do read books 😉 so a parallel activity will be to compile a list of good books on data conversion, data converter design & application and related topics – from entry level to the most advanced treatment. Please tell me which books you’d like to recommend, and if you feel like it you can also provide a brief review of 2–200 words describing what you like about it.
As always: Don’t be shy to promote your own work, your company or any one else you wish to give your unreserved praise. All the readers of Converter Passion are of the generous, happy type (I hope). And if you happen to have a data converter book coming out soon, let us know about it too. I’ll be more than happy to highlight it, and if you send me a copy of the final product I’ll also read it and post a book review here on the blog.
Good to see you all again …
Converter Passion 
“The Data Conversion Handbook” from Analog Devices is the reference text in this area as far as I’m concerned. I worked there for quite some time so I might be a bit biased! 😉
But I’ve also worked at other large analog semi companies, and have seen this book on the shelves of many engineers. ADI offers the entire text in PDF format on their web site, or you can buy the hard copy from Amazon:
http://www.analog.com/library/analogDialogue/archives/39-06/data_conversion_handbook.html
DEC: It’s OK to be biased. An excellent choice, indeed. Thank you!
I’m lucky enough to have gotten a hardcopy of “Analog-Digital Conversion” while at my previous job at Ericsson and, as you say, it is a very good reference. It’s in my bookshelf too. And because ADI decided to have it freely downloadable while also releasing it as a book, this reference will fit both in the book list and in the list of internet resources.
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Hi Bengt,
It has been really pleasure to read you focused blog on Data Converter. It is giving me same feeling. When, I was reading The Art and Science of Analog Circuit Design Book complied by late Jim Williams. It is always learning experience to read experience of expert of respective field.
I am now new to Data Converter field. I came across your blog. While, I was doing search on internet. I am planning to take one or one and half year self interest to do Project on Pipelined ADC (on Weekends @ Office). I am trying to find research topic in Data Converter to start on Pipelined or anyother Data Converter. I would like you to do me a favor . If you have some time. Then, Please suggest me some of Research Topic in Data converter . I would be happy to go through it.
Thank You & Take Care.
Girish
Thank you Girish,
Are you planning to go all the way to implementation and experimental verification, or are you planning to research the topic without necessarily building one?
Thank you Bengt for reply. I am planning to Design from scratch to fabrication for Imaging Field.. As far my plan, I would like to do first Behavioral Modeling, then Transistor Level Design and Final Integration with Layout. So, looking for research Topic Which is bottleneck in it. Thereby, to do some good work on it and along the line learning also.
Do you know the approximate specs {fs, ENOB} for your app?
Hi Bengt,
I really appreciate that, being busy You are replying to my post. But, I will not take your much time. Thank You very much for it. I just want a hook up to get research area. Rest I will go through literature & your blogs comments.
I am not sure about specifications. But, I evaluate Approximate Specifications are as follows. 14 Bit Pipelined ADC
ENOB= 12 Bits
Clock Rate = 50 MSPS
DNL = 0.5 LSB
INL = 1.5 LSB
Low Power with
It should have Low Drift variation over temperature and low noise IR Imaging.
I do not know much very detail specifications. I am going through literature and learning the things.
OK, that narrows it down quite a bit, but still leaves a lot of possibilities for research. The ENOB spec is just at, or perhaps even beyond the matching limit, so looking at ways to calibrate is obviously one possible track. There’s a lot done there, though, and it may also complicate the design beyond what’s manageable in a “weekends-only” project.
Power efficiency is always in vogue, so if you carefully analyze the power contributors in a pipeline and make an attempt to shave off even more than in previous works, that could be something. There’s a paper by Sundström, Murmann and Svensson you could use as a starting point. (TCAS-I: “Power dissipation bounds for high-speed Nyquist analog-to-digital converters“). Power efficiency appears to me as being the main scientific ADC race, so it’ll be an interesting challenge. As you can see from my FOM survey, SAR ADCs are currently in complete domination of the power-efficiency scene. But to evaluate your results you can look at energy-per-sample for other pipeline ADCs with at least the same ENOB.
A third track is to minimize chip area. My feeling is that the scientific community hasn’t been grinding at the area efficiency quite as much as the power efficiency. Again, SAR is more compact than pipeline, but those that wish to put a pipeline ADC on their SoC will be very happy if you know how to make it smaller. My ECCTD paper “Area Efficiency of ADC Architectures” gives an empirical overview of the current state-of-the-art, and can be good as a reference point.
A fourth track could be to find innovative ways to handle the adverse effects of technology scaling, such as reduced swing, etc. etc., and target the most scaled-down node you can. If your boss will pay for that. Apologize for recommending my own works here, but my NORCHIP paper “On CMOS Scaling and A/D-Converter Performance” gives an empirical view of the performance-vs-scaling trends we’ve observed so far. Unless someone comes up with new and better ideas, it looks as if performance will degrade with future CMOS nodes. So, there’s a lot of important research to do there.
Those are four rather general suggestions. Perhaps other blog readers wish to add to it.
Thank You Bengt for clues. I am just downloading above papers from IEEE Explore