ADC survey data


Most of the posts on this blog are based on information derived from ADC survey data. The underlying data set is extracted from an exhaustive search of two journals and seven conferences central to the ADC field from 1974 to present day: The IEEE Journal of Solid-State Circuits and IEEE Transactions on Circuits and Systems, as well as the conferences ISSCC, ESSCIRC, CICC, Symposium on VLSI Circuits, ASSCC, GaAs IC Symp, and BCTM. These sources are continuously scanned, and data reported outside of these sources are also included when discovered. With the exception of Springer Analog Integrated Circuits and Signal Processing (subscription unfortunately outside of the budget for this project), the survey is likely to cover nearly all relevant ADC implementations ever published scientifically. The approximate current distribution of data by source publication is shown in Fig. 1.

Figure 1. ADC paper distribution by source. Only papers reporting measured ADC implementations have been included in the survey. Data until Spring 2012.

The survey is continuously updated. Present state of the survey includes design and performance data until ~Q1-2013 for

  • 1810 scientific ADC implementations
  • 595 commercially released ADC parts

Note that each blog post may choose to focus on a particular subset of the survey data, e.g., scientific-only, CMOS-only, or high-speed ADCs.

So far, the survey data has been the basis for five peer-reviewed scientific contributions [1]-[5].

See also the Converter Passion article A/D-converter performance evolution and A survey of ADC surveys.

References

  1. B. E. Jonsson, “Area Efficiency of ADC Architectures,” Proc. of Eur. Conf. Circuit Theory and Design (ECCTD), Linköping, Sweden, pp. 560–563, Aug. 2011. [Find @ IEEE Xplore]
  2. B. E. Jonsson, “An empirical approach to finding energy efficient ADC architectures,” Proc. of 2011 IMEKO IWADC & IEEE ADC Forum, Orvieto, Italy, pp. 1–6, June 2011. [PDF @ IMEKO]
  3. B. E. Jonsson, “Using Figures-of-Merit to Evaluate Measured A/D-Converter Performance,” Proc. of 2011 IMEKO IWADC & IEEE ADC Forum, Orvieto, Italy, pp. 1–6, June 2011. [PDF @ IMEKO]
  4. B. E. Jonsson, “A survey of A/D-converter performance evolution,” Proc. of IEEE Int. Conf. Electronics Circ. Syst. (ICECS), Athens, Greece, pp. 768–771, Dec., 2010. [Find @ IEEE Xplore]
  5. B. E. Jonsson, “On CMOS scaling and A/D-converter performance,” Proc. of NORCHIP, Tampere, Finland, pp. 1–4, Nov. 2010. [Find @ IEEE Xplore]
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