The Converter Passion FOM-o-meter monitors the FOM status of the ADC field.

Here the FOM-centric professional can check the current state-of-the-art with respect to A/D-converter figures-of-merit (FOM). The list is based on a huge amount of scientific data, and will be updated whenever I discover new ADCs with a better FOM. You can help me to discover them quicker if you’d like to: If you know of any measured ADC implementation with a better FOM you can email me (preferred) the qualifying source reference citation, or post a comment.

I’d suspect that many of you would find it quite prestigious to appear in this list (I certainly would). Well … all you need to do is to implement a world-record ADC, publish your results, and let me know about it. Simple, huh? 😉

Check out the rules and the disclaimer below.

Also remember that this list is submitted to continuous “peer-review” (a.k.a. your comments), so if you have any, they may be valuable to the scientific community. Don’t hold back!

Current coverage: 1974 – Q1-2013. (About survey data)

Page updated: April 14, 2013

# ISSCC FOM

$F_{A1} = \dfrac{P}{2^{ENOB} f_s}$

Current state-of-the art: 2.2 fJ/conv-step [1]

Authors: P. Harpe, E. Cantatore, and A. van Roermund

AffiliationsEindhoven University of Technology, The Netherlands

Architecture: SAR (successive-approximation register)

# Thermal FOM

$F_{B1} = \dfrac{P}{2^{2 ENOB} f_s}$

Scientific delta-sigma modulator (DSM) ADCs are often implemented with the processing of the modulator output done off-chip – typically in Matlab or other software. Although this is perfectly motivated from the experimental context, it does give DSM implementations an unfair advantage over Nyquist converters when power dissipation is included in the comparison. Experimental Nyquist converters usually offer a complete ADC function. It is therefore difficult, if not impossible to directly compare DSM and Nyquist ADC figures-of-merit, which is why the state-of-the-art for both is reported below. I wasn’t done for the “ISSCC FOM” above, because DSM implementations don’t report better ISSCC-FOM even with this power advantage.

## Delta-sigma modulators

Current state-of-the art: 1.1 aJ/conv-step [2]

Authors: J. Xu, X. Wu, M. Zhao, R. Fan, H. Wang, X. Ma, and B. Liu

AffiliationsZheijan University, China, Analog Devices, Shanghai, China

Architecture: DT-DSM (discrete-time delta-sigma modulator)

Current state-of-the art: 2.0 aJ/conv-step [1]

Authors: P. Harpe, E. Cantatore, and A. van Roermund

AffiliationsEindhoven University of Technology, The Netherlands

Architecture: SAR (successive-approximation register)

Previous state-of-the art can be found in the Converter Passion Hall of Fame (ISSCC FOM here, and Thermal FOM here).

The reference list will change on every update, so if numbers “[1]”, etc. are mentioned in comments, they are not necessarily referring to the current reference [1].

Selection rules

Before nominating another design for the list, be sure to read the selection criteria I’ve used. They explain what you see above. To be considered for the list, the following rules apply:

• Reported performance must be from a peer-reviewed scientific conference or journal paper, or from a publicly available data-sheet of a released product.
• I need to have access to the document (which is no problem with IEEE publications, which I can access through IEEE Xplore).
• The document should be in English.
• Simulation-only performance is not considered.
• ENOB is calculated from measured SNDR, or from SNR + THD as a backup. SNR-only performance will not be considered.
• Unjustifiable omission of power dissipation components other than digital I/O (pad drivers) might disqualify a converter from consideration.
• Measured performance and conditions needs to be clearly and unambiguously reported.
• Information from oral presentations at conferences are not considered unless the same information is found in slides supplement that is available through official channels such as IEEE Xplore, the IEEE SSC Digital Archive and similar.
• If the ADC is part of a larger system (SoC), the ADC performance must be measured and reported separately and not derived from the overall performance.
• Only monolithic implementations are considered, with the exception that delta-sigma modulators with off-chip processing of the modulator output are acceptable. [This is a pragmatic compromise, due to the overwhelming majority of scientific ∆-∑ attempts being implemented this way.]
• The rules may be updated.
• Common sense complements the rules …  😉

Disclaimer

The list is believed to be accurate in relation to the information available to me at the time of publication/update, and a significant effort has been made to ensure that the list is a correct representation of the current state-of-the-art, but there is of course no guarantee that the data is correct or suitable for any particular purpose. Also, the underlying data set is updated intermittently, and does not immediately capture changes in the state-of-the-art. Any mistakes, omissions or errors can be reported to the Converter Passion site (cpassion@admsdesign.com).

# References

1. P. Harpe, E. Cantatore, and A. van Roermund, “A 2.2/2.7fJ/conversion-step 10/12b 40kS/s SAR ADC with Data-Driven Noise Reduction,” Proc. of IEEE Solid-State Circ. Conf. (ISSCC), San Francisco, USA, pp. 270–271, Feb., 2013.
2. J. Xu, X. Wu, M. Zhao, R. Fan, H. Wang, X. Ma, and B. Liu, “Ultra Low-FOM High-Precision ΔΣ Modulators with Fully-Clocked SO and Zero Static Power Quantizers,” Proc. of IEEE Custom Integrated Circ. Conf. (CICC), San Jose, California, USA, pp. 1–4, Sept., 2011.

### 7 responses to “ADC FOM-o-meter”

1. Nice overview of everything that is published, these two FOMs are indeed the most interesting ones.

Three authors of the work in [1] are working in our company Axiom IC. This work shows definitely the potential of low-power SAR Nyquist converters. By making the converter ready for mass-production this FOM cannot be met anymore but the concept still beats alternative solutions by far. A 12b 10MS/s version is available. By means of interleaving the sample rate can be increased to several hundred MS/s, this is currently in development.

2. Thank you Clemens,

Must feel really good to have three of them! My best to them all!

It will be interesting to see how far the TI-SAR can actually go. My impression this far is that it has a lot of potential, and might take over a fair bit of traditional “pipeline turf”. You need of course to handle the channel mismatch, but that seems pretty much in place nowadays.

All available scientific data suggests that SAR is significantly more energy-efficient than pipeline. As you say, there is a penalty when you go from scientific experiments to volume production, but I guess experimental pipeline ADCs should suffer just as much from any such penalty, and therefore the relative advantage should remain.