This is the hall of fame for achievements related to the “Thermal FOM” defined as:
It will list current and previous world record holders according to my ADC survey. Current state-of-the-art is found at the top of each list, and there are separate listings for Nyquist and delta-sigma (DSM) ADCs. For more about different figures of merit, check out the “Generic FOM classes” page. An overview of current state-of-the-art for more than one type of FOM is found on the FOM-o-meter page.
DSM ADCs
FOM [aJ] | From | Architecture | Authors | Affiliation(s) | Ref |
---|---|---|---|---|---|
1.1 | Sep 2011 | DT-DSM | J. Xu, X. Wu, M. Zhao, R. Fan, H. Wang, X. Ma, and B. Liu | Zheijan University, China, Analog Devices, Shanghai, China | [1] |
2.7 | Feb 2011 | DT-DSM | A. P. Perez, E. Bonizzoni, and F. Maloberti | University of Pavia, Pavia, Italy | [2] |
3.1 | Sept 2007 | CT-DSM | S. Pavan, N. Krishnapura, R. Pandarinathan, and P. Sankar | Indian Institute of Technology – Madras, Chennai, India | [3] |
References (DSM)
- J. Xu, X. Wu, M. Zhao, R. Fan, H. Wang, X. Ma, and B. Liu, “Ultra Low-FOM High-Precision ΔΣ Modulators with Fully-Clocked SO and Zero Static Power Quantizers,” Proc. of IEEE Custom Integrated Circ. Conf. (CICC), San Jose, California, USA, pp. 1–4, Sept., 2011.
- A. P. Perez, E. Bonizzoni, and F. Maloberti, “A 84dB SNDR 100kHz Bandwidth Low-Power Single Op-Amp Third-Order ΔΣ Modulator Consuming 140μW”, Proc. of IEEE Solid-State Circ. Conf. (ISSCC), San Francisco, USA, pp. 478-480, Feb., 2011.
- S. Pavan, N. Krishnapura, R. Pandarinathan, and P. Sankar, “A 90μW 15-bit ΔΣ ADC for digital audio,” Proc. of Eur. Solid-State Circ. Conf. (ESSCIRC), Munich, Germany, pp. 198–201, Sept., 2007.
Nyquist ADCs
FOM [aJ] | From | Architecture | Authors | Affiliation(s) | Ref |
---|---|---|---|---|---|
2.0 | Sept 2012 | SAR | P. Harpe, E. Cantatore, and A. van Roermund | Eindhoven University of Technology, The Netherlands | [1] |
4.4 | Sept 2012 | SAR | P. Harpe, G. Dolmans, K. Philips, and H. de Groot | Holst Centre and Eindhoven University of Technology, The Netherlands | [2] |
6.0 | June 2012 | SAR | H.-Y. Tai, H.-W. Chen, and H.-S. Chen | National Taiwan University, Taipei, Taiwan | [3] |
6.6 | Feb 2012 | SAR | B. Verbruggen, M. Iriguchi, and J. Craninckx | imec, Leuven, Belgium, Renesas Electronics, Kawasaki, Japan | [4] |
7.6 | Dec 2010 | SAR | C. P. Hurrell, C. Lyden, D. Laing, D. Hummerston, and M. Vickery | Analog Devices, Newbury Berkshire, UK; Analog Devices, Cork, Ireland | [5] |
10 | Feb 2008 | SAR | M. van Elzakker, E. van Tuijl, P. Geraedts, D. Schinkel, E. Klumperink, and B. Nauta | University of Twente, Enschede, Netherlands; Philips Research, Eindhoven, Netherlands; Axiom IC, Enschede, Netherlands | [6] |
References (Nyquist)
- P. Harpe, E. Cantatore, and A. van Roermund, “A 2.2/2.7fJ/conversion-step 10/12b 40kS/s SAR ADC with Data-Driven Noise Reduction,” Proc. of IEEE Solid-State Circ. Conf. (ISSCC), San Francisco, USA, pp. 270–271, Feb., 2013.
- P. Harpe, G. Dolmans, K. Philips, and H. de Groot, “A 0.7V 7-to-10bit 0-to-2MS/s Flexible SAR ADC for Ultra Low-Power Wireless Sensor Nodes,” Proc. of Eur. Solid-State Circ. Conf. (ESSCIRC), Bordeaux, France, pp. 373–376, Sept., 2012.
- H.-Y. Tai, H.-W. Chen, and H.-S. Chen, “A 3.2fJ/c.-s. 0.35V 10b 100KS/s SAR ADC in 90nm CMOS,” Symp. VLSI Circ. Digest of Technical Papers, Honolulu, USA, pp. 92–93, June, 2012.
- B. Verbruggen, M. Iriguchi, and J. Craninckx, “A 1.7mW 11b 250MS/s 2× Interleaved Fully Dynamic Pipelined SAR ADC in 40nm Digital CMOS,” Proc. of IEEE Solid-State Circ. Conf. (ISSCC), San Francisco, California, pp. 466–467, Feb., 2012.
- C. P. Hurrell, C. Lyden, D. Laing, D. Hummerston, and M. Vickery, “An 18 b 12.5 MS/s ADC with 93 dB SNR”, IEEE J. Solid-State Circuits, Vol. 45, pp. 2647-2654, Dec., 2010.
- M. van Elzakker, E. van Tuijl, P. Geraedts, D. Schinkel, E. Klumperink, and B. Nauta, “A 1.9μW 4.4fJ/Conversion-step 10b 1MS/s charge-redistribution ADC,” Proc. of IEEE Solid-State Circ. Conf. (ISSCC), San Francisco, California, pp. 244–245, Feb., 2008.
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