Tag Archives: literature study

New minor revision: A/D-converter performance evolution (v1.1)


T13001-ThumbNote that the recently released A/D-converter performance evolution “eBook”/PDF, has been incremented to v1.1 due to a mistake with Figure 6.3. The latest release can always be reached from the Document Download page. If you pass links around, be sure to link to that page instead of any direct link to a specific release.

My sincere apologies to the 38 readers who downloaded the document during the first hours.

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Now as a free eBook/PDF: A/D-converter performance evolution


Updated (see below)!

I’m happy to see that the “A/D-converter performance evolutionarticle has become the most popular content on Converter Passion. There’s a huge amount of research work put into those ten posts, so I’m glad you liked it.

T13001-ThumbBut even the most die-hard fan of scatter plots and performance trend estimates may find it tiresome to have to click their way through the ten blog posts.  I even feel a bit lost myself from time to time. For your convenience (and mine too), I have therefore made the whole lot available as an “eBook”/PDF, which you can download here (4.8MB). It’s an almost exact replica of the original on-line content, so if you’ve read the original Converter Passion article there’s nothing new here. But it’s likely you find the format much easier to read. I certainly do.

If you’re working with ADCs, you have probably already clicked the link – it’s an absolute no-brainer: A 50-page fully functional PDF with 44 pages of content, 24 illustrations and 92 references. All for free.

Happy reading!

Update 2013-01-07: My sincere apologies to the 40 or so that have downloaded it already, but there was a bug with Fig. 6.3 (it was 6.2 duplicated). The correct graph has now been inserted in v1.1. of the document. Many thanks to EJ & Henk at Catena!

A survey of ADC surveys


Figure 1. Accumulated publication count for scientifically reported ADC implementations in mainstream IEEE sources. The number of publications equivalent to 20% of total is indicated for reference.

SURVEYS GALORE: If the ten posts long A/D-converter survey just concluded did not fully satisfy your desire for scatter plots and tech trends, then this post will provide a list of prior ADC survey works as suggested “further reading”. In fact, I’d recommend everyone serious about data-converter technology trends to get hold of these documents. The list will also serve as a brief history of the ADC survey field. But first some thoughts on surveys:

Survey characteristics

When is it a “survey”? — I’m not going to spend too much energy on a stringent definition of a “survey”. My guideline is that a survey should be based on a significant amount of data, and that the visualization, discussion and interpretation of the data is the main work. Many scientific papers nowadays include a scatter plot that compares a particular design with 5–20 relevant prior efforts. While it’s a good idea to do so, these papers are not considered surveys in this context. Others use large amounts of empirical data to validate or derive a model, but the focus is more on the model.

What is “a significant amount of data”? — The size of the survey should be related to the total amount of data available at the time of the survey. A survey of 200 papers would have been exhaustive in 1990. Today it represents less than 12% of all scientific publications. The accumulated amount of scientific papers over time is shown in Fig. 1. While this is not the absolute total number of ADC publications, it covers the ADC implementations reported in nearly all journals and conferences central to the A/D-converter field, and shall for simplicity be referred to as the “total” amount here. The number of sources equivalent to 20% of the accumulated total at any given time is also shown in Fig. 1.

So, how much of the total do I need? Well, it depends on what you’re trying to do. When it comes to survey data, I’m a firm believer in “the more the merrier”, but there are tasks which can be done with a fairly small subset. For example, if you want to get an idea of the overall trend for one parameter vs. another or just make a quick sanity check.

Small subsets do have some limitations though. For the subset to function as a reasonably generic approximation of the exhaustive set, its data must span roughly the same chunk of parameter space, and have similar distribution of values in all dimensions. This is difficult to achieve unless you make a random sampling of the exhaustive set. A smaller set also risks running out of data, for example when dividing it further according to some parameter such as resolution or architecture.

How quickly will a survey become dated? — I really don’t know. I guess it depends on what you wish to study. But we can observe, as in Fig. 2, how the accumulated total at any given time relates to the overall total (here 1708 papers), and what percentage of currently available works were yet unpublished at any given time (e.g., at the end year of a particular survey). It is seen that approximately 50% of all currently available papers (~Q1-2012) were published in the last 8–8.5 years, i.e., after 2003, and almost 30% were not yet published in 2007. By the end of 1997, 70% of today’s body of empirical data was still unpublished.

You can use Fig. 2 to assess how old a survey can be before it’s no longer useful for your purpose. Can you make business decisions based on trend estimates where the most recent half of the data set is missing? Probably not. Most recent 30/20/10%? If so, you need a survey that’s less than approximately 4/3/1 years old.

It is clear that continuously updated surveys, such as Murmann’s, or the one used here at Converter Passion are preferable over single-shot attempts, since the former allows for continuously updated trend estimations.

Figure 2. Paper “yield”. The fraction of current total already published (blue) and yet to be published (red) at the end of any given year.

Known ADC surveys

Author Size Years Type What Ref
Walden 100 ≤ 1994 Both Perf. limits, FOM [1]
Walden 150 1978-1997 Both Perf. limits, FOM, jitter, evolution [2]
Merkel 150 1993-2002 Both Perf. limits, SFDR, power, VDD, scaling, device, arch. [3]
Le 1000 1983-2004 Parts Perf. limits, jitter, cost, arch., no. chan, N [4]
Walden 175 1978-2007 Both Update++ [5]
Walden n/a 1978-2008 Both Update [6]
Murmann ~260 1997-2008 Sci Perf. limits, VDD, scaling, FOM, evolution [7]
Jonsson 1400 1974-2010 Sci Perf., VDD, scaling, FOM, evolution [8]
Jonsson 1100 1976-2010 Sci Perf. & FOM vs. CMOS scaling, evolution [9]
Fuiano 5540 1970-2010 Sci Data-converters, research/patent correlation [10]
Jonsson 1400 1974-2010 Sci Energy/sample by arch [11]
Jonsson 1500 1974-2011 Sci Area eff by arch [12]
Murmann ~350 1997-2012 Sci Online survey data [13]
Jonsson 1700 1974-2012 Sci Perf., VDD, scaling, jitter, SFDR, FOM, evolution [14]

About the surveys

Walden

The “mother of all ADC surveys”, and the most frequently cited of all, is the pioneering work by Walden [2] where 150 scientific and commercial ADCs were analyzed, and performance trends were extracted. An earlier version was published already in 1994 [1], but this extended work became “The Walden Survey” to most of us. Although the 150 source documents originated from a mix of commercial and experimental designs, the Walden survey had a size equivalent to 30% of all scientific publications available at the time. The methods introduced in [2] are still useful, but Fig. 1 and Fig. 2 suggest that the trends extracted in [2] are unlikely to be valid and applicable today. At least they would have to be confirmed using more recent data. Two updated versions of the survey were published in 2008 – one covering 175 ADCs and data until 2007 [5], and one with an unspecified survey size and data until 2008 [6]. It is unclear how the 175 converters included in [5] were selected. During the time from Walden’s classic survey to 2007, the academic output alone generated another 715 new sources – commercial parts not counted. The +25 increase in source data therefore seems surprisingly incremental. Still, some of the results in [5] align very well with Converter Passion data, so apparently it was a carefully chosen subset.

Merkel & Wilson

Merkel and Wilson surveyed 150 commercial and scientific ADCs with specifications suitable for defense space applications [3]. Their data appear to span from 1993–2002, and the selection criteria for inclusion in the survey was a sampling rate fs ≥ 1 MS/s, and nominal resolution ≥ 12 bits. The paper does not reveal the mix between scientific papers and commercial parts, but gathering 150 sources must have been quite an effort by the authors. The total scientific output matching these specs and the time period is no more than 81 papers, and only 59 in the two sources (ISSCC, JSSC) the authors mention as primary. An additional minimum of 69–91 commercial parts must have been included to reach 150 sources. It is therefore assumed that the Merkel & Wilson data set was close to exhaustive for the spec range surveyed, and exhaustive data sets are always applauded here at Converter Passion.

The analysis and discussion itself is geared towards the stated application and focused on linearity (SFDR) to the extent that noise parameters are not treated at all. Power dissipation, supply voltage, speed, device type, scaling and architecture were observed.

Le, Rondeau, Reed & Bostian

An enormous data set, covering nearly 1000 commercial ADC parts from 1983–2004 was used in the survey by Le, Rondeau, Reed and Bostian [4]. As a comparison, the scientific output from the same years (not included in their survey) is 900 papers. The work is firmly rooted in the Walden tradition, but also considers parameters such as the number of channels per package and cost vs. performance. Additionally, the treatment separates the data by architecture, which adds an interesting extra dimension. Because of the larger volume and time span of the data set, part of the focus is to establish differences between this work and the classic Walden paper. Unfortunately, some exponentially improving parameters were plotted along linear axes, which makes many results from the survey difficult to see or interpret. Nevertheless, the contribution by Le et al. is a gigantic work and a key reference.

Murmann

The survey by Murmann [7] is a significant recent contribution to the analysis of empirical performance data. It covers approximately 260 scientific ADCs reported 1997–2008 at the two conferences VLSI Circuit Symposium and ISSCC. The work analyzes ADC performance trends with a focus on energy per sample and signal-to-noise-and-distortion ratio (SNDR). The impact of process and voltage scaling is considered. If you don’t have this paper already, you should definitely head over to IEEE Xplore and get it right now.

Murmann’s survey has further benefits in that it is continuously updated and the data set is available online [13]. The latter opens up a lot of possibilities for anyone wishing to analyze the data in their own way, and makes the survey a very important contribution to the field. It currently includes around 350 sources.

Fuiano, Cagnazzo & Carbone

A rather different angle is taken in [10], where Fuiano, Cagnazzo and Carbone use survey data to analyze the correlation between scientific literature and patent activity. Compared to more “Waldenesque” surveys, this is a rather different animal. It nevertheless appeals to me as it illustrates an attempt to mine large amounts of survey data for something more unusual than ENOB, fs and FOM.

Jonsson

The ADMS Design data set used here at Converter Passion has also been used in five scientific papers, of which four are “surveys”:

  • ADC trends and performance evolution over time was analyzed in [8].
  • The impact of CMOS scaling on ADC performance was empirically analyzed in [9].
  • ADC architectures were compared with respect to energy efficiency in [11].
  • Area-efficiency of ADC architectures was surveyed in [12].

The largest survey for which this data set has been used so far is the recently published series of posts on A/D-converter performance evolution [14].

Other survey-related literature

A few other prior publications that are “survey-ish”, or otherwise use a large set of empirical data for their analysis are listed here:

  • Vogels and Gielen used a multidimensional regression fit to derive an ADC power dissipation model/FOM based on ≥ 70 empirical data points divided by architecture [15]. A similar approach was recently used by Verhelst and Murmann to analyze power dissipation and area vs. scaling based on Murmann’s data set [16] .
  • Sundström, Murmann, and Svensson derived theoretical power dissipation bounds in [17], and used the Murmann set to compare theory with empirical reality.
  • In [18], it was illustrated how the quality of a figure-of-merit (FOM) can be assessed by testing it against a large set of empirical data.

If you feel that I’ve left out any contributions that could have been mentioned in this post, just add a comment below.

See also …

ADC survey data

A/D-converter performance evolution

EveryNano Counts: “Those ADC Literature Surveys”

References

  1. R. H. Walden, “Analog-to-digital converter technology comparison,” in Proc. of GaAs IC Symp., pp. 228–231, Oct., 1994.
  2. R. H. Walden, “Analog-to-digital converter survey and analysis,” IEEE J. Selected Areas in Communications, no. 4, pp. 539–550, Apr. 1999.
  3. K. G. Merkel, and A. L. Wilson, “A survey of high performance analog-to-digital converters for defense space applications,” in Proc. IEEE Aerospace Conf., Big Sky, Montana, Mar. 2003, vol. 5, pp. 2415–2427.
  4. B. Le, T. W. Rondeau, J. H. Reed, and C. W. Bostian, “Analog-to-digital converters [A review of the past, present, and future],” IEEE Signal Processing Magazine, pp. 69–77, Nov. 2005.
  5. R. Walden, “Analog-to-digital conversion in the early twenty-first century,” Wiley Encyclopedia of Computer Science and Engineering, pp. 126–138, Wiley, 2008.
  6. R. H. Walden, “Analog-to-digital converters and associated IC technologies,” in Proc. Compound Semiconductor Integrated Circuits Symp., Monterey, Oct. 2008, pp. 1–2.
  7. B. Murmann, “A/D converter trends: Power dissipation, scaling and digitally assisted architectures,” Proc. of IEEE Custom Integrated Circ. Conf. (CICC), San Jose, California, USA, pp. 105–112, Sept., 2008.
  8. B. E. Jonsson, “A survey of A/D-converter performance evolution,” Proc. of IEEE Int. Conf. Electronics Circ. Syst. (ICECS), Athens, Greece, pp. 768–771, Dec., 2010.
  9. B. E. Jonsson, “On CMOS scaling and A/D-converter performance,” Proc. of NORCHIP, Tampere, Finland, Nov. 2010.
  10. F. Fuiano, L. Cagnazzo, and P. Carbone, “Data Converters: an Empirical Research on the Correlation between Scientific Literature and Patenting Activity,” Proc. of 2011 IMEKO IWADC & IEEE ADC Forum, Orvieto, Italy, pp. 1–6, June, 2011.
  11. B. E. Jonsson, “An empirical approach to finding energy efficient ADC architectures,” Proc. of 2011 IMEKO IWADC & IEEE ADC Forum, Orvieto, Italy, pp. 1–6, June 2011.
  12. B. E. Jonsson, “Area Efficiency of ADC Architectures,” Proc. of Eur. Conf. Circuit Theory and Design (ECCTD), Linköping, Sweden, pp. 560–563, Aug., 2011.
  13. B. Murmann, “ADC Performance Survey 1997-2012,” [Online]. Available: http://www.stanford.edu/~murmann/adcsurvey.html.
  14. B. E. Jonsson, “A/D-converter Performance Evolution,” Converter Passion, Aug., 2012, Available: https://converterpassion.wordpress.com/articles/ad-converter-performance-evolution/.
  15. M. Vogels, and G. Gielen, “Architectural Selection of A/D Converters,” Proc. of Des. Aut. Conf. (DAC), Anaheim, California, USA, pp. 974–977, June, 2003.
  16. M. Verhelst, and B. Murmann, “Area scaling analysis of CMOS ADCs,” El. Letters, Vol. 48, No. 6, pp. 315–315, Mar., 2012, IEE.
  17. T. Sundström, B. Murmann, and C. Svensson, “Power dissipation bounds for high-speed Nyquist analog-to-digital converters,” IEEE Trans. Circuits and Systems, pt. I, vol. 56, no. 3, pp. 509–518, Mar. 2009.
  18. B. E. Jonsson, “Using Figures-of-Merit to Evaluate Measured A/D-Converter Performance,” Proc. of 2011 IMEKO IWADC & IEEE ADC Forum, Orvieto, Italy, pp. 1–6, June 2011.

ADC performance evolution: Walden figure-of-merit (FOM)


Figure 1. Evolution of best reported Walden FOM for delta-sigma modulators (o) and Nyquist ADCs (#). Monotonic state-of-the-art improvement trajectories have been highlighted. Trend fit to DSM (dotted), and Nyquist (dashed) state-of-the-art. Average trend for all designs (dash-dotted) included for comparison.

POWER EFFICIENCY TRENDS: A series of blog posts on A/D-converter performance trends would not be complete without an analysis of figure-of-merit (FOM) trends, would it? We will therefore take a look at the two most commonly used FOM, starting with the by far most popular:

(1) : F_{A1} = \dfrac{P}{{2}^{ENOB}\times f_{s}}

where P is the power dissipation, fs is Nyquist sampling rate, and ENOB is the effective number of bits defined by the signal-to-noise and-distortion ratio (SNDR) as:

(2) : ENOB = \dfrac{SNDR - 1.76}{6.02}

FA1 is sometimes referred to as the Walden or ISSCC FOM and relates the ADC power dissipation to its performance, represented by sampling rate and conversion error amplitude. The best reported FA1 value each year has been plotted for delta-sigma modulators (DSM) and Nyquist ADCs in Fig. 1. Trajectories for state-of-the-art have been indicated, and trends have been fitted to these state-of-the-art data points. The average improvement trend for all ADCs (2×/2.6 years) is included for comparison.

By dividing the data into DSM and Nyquist subsets, it is seen that delta-sigma modulators have improved their state-of-the-art FOM at an almost constant rate of 2×/2.5 years throughout the existence of the field – just slightly faster than the overall average. State-of-the-art Nyquist ADCs have followed a steeper and more S-shaped evolution path. Their overall trend fits to a 2× improvement every 1.8 years, although it is obvious that evolution rates have changed significantly over time. A more accurate analysis of Nyquist ADC trends should probably make individual fits of the early days glory, the intermediate slowdown, and the recent acceleration phase. This was done in [1] where evolution was analyzed with DSM and Nyquist data merged. However, for simplicity I’ll just stick to the more conservative overall Nyquist trend. [I wouldn’t want anyone to suggest that I’m producing “subjective” or “highly speculative” trend estimates, would I? 😉 ]

Still, if anyone is curious to know … 🙂 … the state-of-the-art data points fit to a 2×/14 months trend between 2000 and 2010. That’s actually faster than Moore’s Law, which is traditionally attributed a 2×/18 months rate [2]-[3]. A new twist on “More than Moore”, perhaps? Even the more conservative overall 2×/21 months trend is close enough to conclude that the state-of-the-art FOM for Nyquist ADCs has developed exponentially in a fashion closely resembling Moore’s Law. And that’s got to be an impressive trend for any analog/mixed circuit performance parameter.

Irrespective of what’s the best fit to data, it should be evident from Fig. 1 that Nyquist ADCs broke away from the overall trend around year 2000, and has since followed a steeper descent in their figures-of-merit. They have also reached further (4.4 fJ) [4] than DSM (35.6 fJ) [5]. The overall trend projects to a 0.2 fJ ADC FOM in 2020. Whether or not that’s possible, we’ll leave for another post. A deeper look at the data also reveals that:

  • The acceleration in state-of-the-art is almost completely defined by successive-approximation (SAR) ADCs [4], [6]-[11], accompanied by a single cyclic ADC [12]. The superior energy efficiency of the SAR architecture was empirically shown in [13].
  • A significant part of the acceleration can be explained by the increased tendency to leave out, for example I/O power dissipation when reporting experimental results – a trend also observed by Bult [14]. The FOM in the graph was intentionally calculated from the on-chip rather than total power dissipation because: (a) ADCs are increasingly used as a system-on-chip (SoC) building block, which makes the stand-alone I/O power for a prototype irrelevant, and (b) Many authors don’t even report the I/O power anymore.
  • FA1 has a bias towards low-power, medium resolution designs rather than high-resolution, and thus benefits from CMOS technology scaling as shown in [15],[16]. An analysis of the underlying data shows that, for the best FA1 every year, the trajectories for ENOB and P follows distinct paths towards consistently lower power and medium resolution. You simply gain more in FA1 by lowering power dissipation than by increasing resolution because (1) does not correctly describe the empirically observed power-resolution tradeoff for ADCs [13],[15].

In order to compare high-resolution ADCs limited by thermal noise, it has therefore been proposed to use a slightly different FOM, sometimes labeled the “Thermal FOM” [17]-[18],

(3) : F_{B1} = \dfrac{P}{{2}^{2\times ENOB}\times f_{s}}

This figure-of-merit will be the topic of the next post.

See also …

ADC survey data

Walden’s survey [19]

References

  1. B. E. Jonsson, “A survey of A/D-converter performance evolution,” Proc. of IEEE Int. Conf. Electronics Circ. Syst. (ICECS), Athens, Greece, pp. 768–771, Dec., 2010.
  2. G.E. Moore, “Cramming more components onto integrated circuits,” Electronics, Vol. 38, No. 8, Apr. 1965.
  3. G. E. Moore, “No exponential is forever: but “forever” can be delayed!,” IEEE ISSCC, Dig. Tech. Papers, San Francisco, CA, Feb. 2003, pp. 20–23.
  4. M. van Elzakker, E. van Tuijl, P. Geraedts, D. Schinkel, E. Klumperink, and B. Nauta, “A 1.9μW 4.4fJ/Conversion-step 10b 1MS/s Charge-Redistribution ADC,” Proc. of IEEE Solid-State Circ. Conf. (ISSCC), San Francisco, California, pp. 244–245, Feb., 2008.
  5. J. Xu, X. Wu, M. Zhao, R. Fan, H. Wang, X. Ma, and B. Liu, “Ultra Low-FOM High-Precision ΔΣ Modulators with Fully-Clocked SO and Zero Static Power Quantizers,” Proc. of IEEE Custom Integrated Circ. Conf. (CICC), San Jose, California, USA, pp. 1–4, Sept., 2011.
  6. A. Shikata, R. Sekimoto, T. Kuroda, and H. Ishikuro, “A 0.5 V 1.1 MS/sec 6.3 fJ/Conversion-Step SAR-ADC With Tri-Level Comparator in 40 nm CMOS,” IEEE J. Solid-State Circuits, Vol. 47, pp. 1022–1030, Apr., 2012.
  7. T.-C. Lu, L.-D. Van, C.-S. Lin, C.-M. Huang, “A 0.5V 1KS/s 2.5nW 8.52-ENOB 6.8fJ/Conversion-Step SAR ADC for Biomedical Applications,” Proc. of IEEE Custom Integrated Circ. Conf. (CICC), San Jose, California, USA, pp. 1–4, Sept., 2011.
  8. S.-K. Lee, S.-J. Park, Y. Suh, H.-J. Park, and J.-Y. Sim, “A 1.3µW 0.6V 8.7-ENOB Successive Approximation ADC in a 0.18µm CMOS,” Symp. VLSI Circ. Digest of Technical Papers, Honolulu, USA, pp. 242–243, June, 2009.
  9. H.-C. Hong, and G.-M. Lee, “A 65-fJ/Conversion-Step 0.9-V 200-kS/s Rail-to-Rail 8-bit Successive Approximation ADC,” IEEE J. Solid-State Circuits, Vol. 42, pp. 2161–2168, Oct., 2007.
  10. M. D. Scott, B. E. Boser, and K. S. J. Pister, “An Ultra-Low Power ADC for Distributed Sensor Networks,” Proc. of Eur. Solid-State Circ. Conf. (ESSCIRC), Firenze, Italy, pp. 255–258, Sept., 2002.
  11. M. D. Scott, B. E. Boser, and K. S. J. Pister, “An Ultralow-Energy ADC for Smart Dust,” IEEE J. Solid-State Circuits, Vol. 38, pp. 1123–1129, July, 2003.
  12. D. Muthers, and R. Tiekert, “A 0.11mm2 low-power A/D-converter cell for 10b 10MS/s operation,” Proc. of Eur. Solid-State Circ. Conf. (ESSCIRC), Leuven, Belgium, pp. 251–254, Sept., 2004.
  13. B. E. Jonsson, “An empirical approach to finding energy efficient ADC architectures,” Proc. of 2011 IMEKO IWADC & IEEE ADC Forum, Orvieto, Italy, pp. 1–6, June 2011. [PDF @ IMEKO]
  14. K. Bult, “Embedded analog-to-digital converters,” Proc. of Eur. Solid-State Circ. Conf. (ESSCIRC), Athens, Greece, pp. 52–60, Sept., 2009.
  15. B. E. Jonsson, “Using Figures-of-Merit to Evaluate Measured A/D-Converter Performance,” Proc. of 2011 IMEKO IWADC & IEEE ADC Forum, Orvieto, Italy, pp. 1–6, June 2011. [PDF @ IMEKO]
  16. B. E. Jonsson, “On CMOS scaling and A/D-converter performance,” Proc. of NORCHIP, Tampere, Finland, Nov. 2010.
  17. A. M. A. Ali, C. Dillon, R. Sneed, A. S. Morgan, S. Bardsley, J. Kornblum, and L. Wu, “A 14-bit 125 MS/s IF/RF sampling pipelined ADC with 100 dB SFDR and 50 fs jitter,” IEEE J. Solid-State Circuits, Vol. 41, pp. 1846–1855, Aug, 2006.
  18. C. Wulff, and T. Ytterdal, “Design of a 7-bit, 200MS/s, 2mW pipelined ADC with switched open-loop amplifiers in a 65nm CMOS technology,” Proc. of NORCHIP, Aalborg, Denmark, Nov., 2007.
  19. R. Walden, “Analog-to-digital conversion in the early twenty-first century,” Wiley Encyclopedia of Computer Science and Engineering, pp. 126–138, Wiley, 2008.

ADC research trends: Endangered performance parameters


Figure 1. Fraction of papers reporting a specific parameter.

SCIENTIFIC PRACTICES: In the previous post, your opinions on which parameters should be mandatory in an A/D-converter implementation paper were surveyed through a poll. In this one we will see what parameters actually get reported in scientific papers, and how the overall reporting practices have changed over time. We can also try to see how well Converter Passion reader’s opinions are in sync with harsh scientific reality 😉

Working with the ADC survey, I had noticed that the set of measured performance parameters authors choose to report or omit changed over time. I’ve gathered the statistics, and it will be interesting to hear what you think of it. Figure 1 shows the percentage of papers reporting signal-to-noise-and-distortion ratio (SNDR), signal-to-noise ratio (SNR), spurious-free dynamic range (SFDR) and total harmonic distortion (THD) each year. The good news is that dynamic single-tone performance is more frequently reported in today’s papers than ever before. In fact, SNDR was reported in 96% of all papers from 2011. Both SNDR and SFDR show noisy but steadily increasing trends, and SFDR is now reported in around 68% of all papers (2011).

At the same time, SNR is increasingly being abandoned in favor of simply reporting SNDR instead. We can also see that THD is becoming an endangered parameter. SNR and THD have been in a visible decline after year 2000, and THD was only reported in 12% of the papers in 2011. SNR went from 60% in year 2000 to 41% 2011. These numbers trouble me. If the trend continues, we will know less about the noise in our A/D-converters for each year. I can’t possibly see how that can be of benefit to “Science” or to the reader. If you can, be sure to post a comment below.

Figure 2. Fraction of papers reporting specific combinations of parameters.

Above we looked at the reporting frequency for each individual parameter. Authors also choose which simultaneous combination or set of performance parameters they include in a paper. This is shown in Fig. 2. Many works report SNDR together with SFDR, and 67% of all papers from 2011 reported at least these two parameters. There is a strong positive trend, so within a decade we may see SNDR+SFDR reported in nearly all published papers. The second most popular parameter pair is SNDR+SNR, with 38% coverage in 2011. Unfortunately, its reporting frequency is limited by the negative trend for SNR.

A more complete single-tone characterization is achieved with the three-parameter combination SNDR+SNR+SFDR. Only 21% of all papers published in 2011 offer this much information about the circuit. Even if there is currently a positive trend, it might soon become limited by the decline in SNR reporting, and eventually reverse.

The practice to report a full four-parameter set is very unusual – only 9% of the papers did that in 2011. It has actually never been really common, and if THD continues to disappear from papers, the four-parameter performance will be increasingly rare. Lots of credit to authors that are still reporting a full set! It is much appreciated here at Converter Passion.

Rare species

Finally, a few other rare species in the ADC parameter ecosystem are shown in Fig. 3. While the highly valuable parameter self-noise appears to be on its way to extinction, intermodulation distortion (IMD) as represented by the second– and third-order intercept point (IP2, IP3) seems to cling to life in the outskirts of the habitat.

So … what do you make of all this? Do you think it will have any long-term impact on our field of science? Does it matter to you what parameters are reported or not? Have your say in the comments below.

And, what happened around year 2000 to shift the trends so dramatically? Was it the dot-com boom or the Y2K bug? (I haven’t heard about that one for a while now)

Figure 3. Endangered species in the parameter ecosystem.