ADC FOM UPDATE: It’s now “post-ISSCC”, which is a more than sufficient reason to update the survey. If you were lucky enough to attend ISSCC this year, you may be familiar with the progress in A/D-converter figure-of-merit (FOM) since the Christmas 2012 Update. If not, I will summarize it here. This update also covers the most recent issues of IEEE Journal of Solid-State Circuits (JSSC), Transactions on Circuits and Systems pt. I and II, and ADC papers from ISOCC 2012. Unfortunately, the 2012 version of A-SSCC doesn’t seem to have made it into IEEE Xplore yet, so the 11 or so ADC papers that were published there will have to wait until next update. Even without the A-SCCC 2012, the survey now includes 4057 experimental data points extracted from 1810 scientific papers published between 1974 and Q1-2013.
Already from the paper titles in the ISSCC 2013 Advance Program, it was clear that the previous 2.8 fJ world record by Harpe et al.  wasn’t going to stand for long. Of the two papers reporting an improved Walden FOM, the 10-b SAR by Liou and Hsieh , National Tsing Hua University, Hsinchu, Taiwan, achieves an impressive 2.4 fJ. Nevertheless, Pieter Harpe and coauthors Cantatore and van Roermund from Eindhoven University of Technology, The Netherlands, keep the leader position through their new 10/12-b SAR , achieving 2.2 fJ in 12-b mode.
Clearly, both of the above designs are outstanding works. Something I particularly liked with the Harpe ADC was the elegant way they reduced the impact of comparator noise only for the decision(s) when it is really needed (i.e., when the comparator input is weak). Check it out, and enjoy the beauty of it all.
Another highlight is that Harpe et al. were able to set the new FOM world record and simultaneously push ENOB to 10.1 bits. Since the Walden FOM does not correctly model the energy vs. resolution trade-off for thermal noise limited designs, it is more difficult to achieve a good FOM the higher resolution you have. We’ll take a deeper look into that very soon in future posts. For now we can just conclude that the effort represented by their result is therefore even more admirable.
As observed in the Christmas 2012 Update, state-of-the-art Walden FOM is typically reported at lower-than-nominal supply voltages. This is true also for the present update. If you are aiming to win the FOM race you obviously need to make a really good design in the first place. Then, when you’re measuring, it seems that a good advice would be to sweep the VDD downwards, accept that the circuit becomes slower and noisier, and simply search for the VDD sweet spot where you get the best FOM to report.
Another striking feature is that sub-10fJ Walden FOM has so far been reported from only a handful of countries, of which The Netherlands and Taiwan currently seem to have the initiative. I will probably focus on this geographical aspect in a separate post, so I’ll just leave you with this teaser for now.
As in the previous update, no progress is reported beyond the Thermal FOM of 1.1 aJ reported by Xu , but for Nyquist ADCs, the Walden FOM winner above  is also the new Thermal FOM winner with a new world record of 2.0 aJ. So, double gold medals for Harpe, Cantatore and van Roermund from Eindhoven University of Technology. Excellent job!
I also want to mention that the design by Liou and Hsieh  – the silver medalists in the Walden FOM category above – also weigh in as the third best Thermal FOM ever reported for Nyquist ADCs.
There are a few more designs now becoming visible on my “sub-10aJ radar”. Of these, I’d like to point out the ring-amp based ADC by Hershberg et al. . First of all it’s not a SAR. Among low-energy Nyquist ADCs, that’s unusual in itself. Secondly, the authors suggest that Ring Amp realization of ADCs could be a way to beat the noise-floor vs. technology scaling limits predicted for example by myself in . And, as much as I like to be right in my predictions, I still prefer that I am wrong and the ADC field continue to evolve beyond all limits we can see today. So I hope they are right about the Ring Amp ADC, and will follow up with more experimental results to establish that once and for all.
Or … that someone else of you has something even better in your drawer.
Unless I get too fascinated with the geographic aspects of low-energy ADC research, the plan is to start looking at the energy vs. performance limits from a mostly empirical perspective. I hope to deliver something that is useful for those of you active in this race.
- P. Harpe, G. Dolmans, K. Philips, and H. de Groot, “A 0.7V 7-to-10bit 0-to-2MS/s Flexible SAR ADC for Ultra Low-Power Wireless Sensor Nodes,” Proc. of Eur. Solid-State Circ. Conf. (ESSCIRC), Bordeaux, France, pp. 373–376, Sept., 2012.
- C.-Y. Liou, and C.-C. Hsieh, “A 2.4-to-5.2fJ/conversion-step 10b 0.5-to-4MS/s SAR ADC with Charge-Average Switching DAC in 90nm CMOS,” Proc. of IEEE Solid-State Circ. Conf. (ISSCC), San Francisco, USA, pp. 280–281, Feb., 2013.
- P. Harpe, E. Cantatore, and A. van Roermund, “A 2.2/2.7fJ/conversion-step 10/12b 40kS/s SAR ADC with Data-Driven Noise Reduction,” Proc. of IEEE Solid-State Circ. Conf. (ISSCC), San Francisco, USA, pp. 270–271, Feb., 2013.
- J. Xu, X. Wu, M. Zhao, R. Fan, H. Wang, X. Ma, and B. Liu, “Ultra Low-FOM High-Precision ΔΣ Modulators with Fully-Clocked SO and Zero Static Power Quantizers,” Proc. of IEEE Custom Integrated Circ. Conf. (CICC), San Jose, California, USA, pp. 1–4, Sept., 2011.
- B. Hershberg, S. Weaver, K. Sobue, S. Takeuchi, K. Hamashita, and U.-K. Moon, “Ring Amplifiers for Switched Capacitor Circuits,” IEEE J. Solid-State Circuits, Vol. 47, pp. 2928–2942, Dec., 2012.
- B. E. Jonsson, “On CMOS scaling and A/D-converter performance,” Proc. of NORCHIP, Tampere, Finland, pp. 1–4, Nov. 2010.